ARM Wars: Intel Strikes Back

Intel unveiled its much anticipated answer to the enterprise-class ARM architecture this week, setting up what will undoubtedly be a return to the processor wars of old, except this time the race will be about efficiency rather than raw power.

The new Atom S1200 SoC, the “Centerton,” is aimed squarely at the microserver and entry-level server models that are expected to form the heart of new Web-facing data infrastructure. By loading up on multiple low-power chips as opposed to fewer top-of-the-line devices like the Xeon, enterprises are expected to better handle the diverse and highly dynamic data loads that are the hallmark of new cloud-based, collaborative environments.

The S1200 is a 64-bit platform built on a 32 nm architecture, but its most impressive feat is that it falls below a 10-watt power envelope, meaning enterprises can use them for heavy data loads while still consolidating processing power to as few cores as possible to help cut energy costs even further. The chips are outfitted with forward error correction and hyper-threading techniques, allowing the overall server architecture to handle multiple tasks at once. A single Atom node can now hold up to 1,000 cores, five times as many as the Xeon E3 at a fraction of the cost per core.

The company has already drawn more than 20 design wins for the S1200, including Dell, HP and Huawei. HP, for example, is eyeing them for the Project Moonshot program, designed to foster hyperscale server architectures. The company has already committed to building Moonshot servers using EnergyCore ECX-1000 ARMs from Caldexa, an indication that HP, at least, is keeping its options open when it comes to the low-power architectures of the future. But it also shows that, despite ARM’s momentum in the data center and already broad adoption among mobile devices, Intel is not about to cede any of its long-held enterprise turf without a fight.

Intel is also prepping for the release of the “Briarwood” line of Atoms, which are intended for SAN and storage building block (SBB) deployments. The devices are expected to closely mirror the Centerton model, although they will be outfitted with a number of storage-specific add-ons such as a DDR scrambler and memory optimization techniques, as well as support for RAID 5 and 6. In addition, they will offer 32 or 40 lanes of PCIe 2.0 connectivity, making them a welcome addition to storage environments that have been struggling to keep up with the pace of data networking elsewhere in the data center.

Of course, it’s too early to tell how the new Atoms stack up against the ARM. Independent benchmarking will undoubtedly kick off in the new year once volume shipments begin. More than likely, however, performance will vary according to legacy infrastructure, the type of data load and other factors.

Regardless of whose technology is deployed, however, the mere fact that there are more processor types on the table means the enterprise will have a greater number of tools at their disposal to optimize data infrastructure for the increasing variety of workloads that are emerging.