The server interface has risen in prominence within the data center infrastructure as clustered architectures have taken hold. Now, with the development of the near-line SSD tier, technologies like PCIe are proving to be more valuable than their weight in gold.
Solid-state storage came along just in time for things like Web serving, on-line transaction processing and Big Data applications, but the fact is that the fastest drive in the world is only as useful as the network it's connected to. So relegating Flash technology to the mechanical world of SAS and SATA made for a less-than-ideal use of its high-speed qualities.
Now, with new generations of PCIe technology in the channel, the floodgates are open for truly high-speed data environments.
SanDisk, for example, recently introduced the Lightning PCIe solid-state accelerator card sporting a new parallel processing controller architecture designed to provide greater balance between data protection and I/O functionality. The goal is to offload data handling from the CPU in a low-power footprint without the need for additional DRAM or software/system modifications. The device comes in 200 and 400 GB versions and can be stacked five at a time for a maximum capacity of 2 TB. SanDisk FlashSoft caching software is also available as an additional storage tier for large workloads.
Meanwhile, STEC has been showing its PCIe accelerators as part of a Hadoop appliance in conjunction with AMAX Information Technologies and Mellanox. The company has bundled four of its 980 GB accelerators with AIT's PHAT-Data40G petascale analytics platform with 40 GbE network support from Mellanox. Combined, five of the systems can sift through a 1 TB dataset in less than half an hour at about half the cost of standard setups. The system also incorporates Zettaset installation, management and security tools for advanced Hadoop acceleration.
However fast PCIe infrastructure is at the moment, it's about to get faster with the advent of the Gen 3 specification. PLDA is showing its PCIe Gen 3 soft IP core at the DAC conference in San Francisco this week running on Xilinx's Kintex-7 FPGA platform. The package supports Gen 1, 2 and 3 speeds in x1, x2, x4 and x8 configurations, providing IP core functions as either RTL or source code, along with related bus functional models and a software design kit.
At the same time, LSI has added PCIe 3.0 support to its 12 Gbps DataBolt bandwidth optimizer. The device provides advanced buffering for multiple drives sharing a 12 Gbps connection, enabling various combinations of 3 and 6 Gbps SAS drives while utilizing the full bandwidth capabilities of the Gen 3 interface. The solution is expected to be available with new cabling options and a Mini SAS HD connector that will support active and passive copper networks, as well as optical technology.
Few existing enterprises are likely to take such a drastic step, however. For the moment, the high-speed tier is the best way to ensure that existing infrastructure can keep up with increasingly demanding data environments.