FPGA Settles into PCIe Groove

Arthur Cole

PCI-Express developers are making full use of the field-programmable gate array (FPGA) to host their latest core designs, with backers saying they provide greater flexibility than standard ASICs for more specialized functions.

 

Earlier this week, according to Embedded Computing Design, PLD Applications announced that its PCIe XpressLine x1 core will be ported to Lattice Semiconductor's 90 nm ECP2M FPGA family. The companies hope that by matching the ECP2M's Physical Coding Sublayer (PCS) and SerDes (serializer/deserializer) with the PLDA's PIPE (Physical Interface for PCI Express) design, they'll be able to deliver a high-bandwidth solution in a tight form factor.

 

FPGAs generally don't draw as much interest as ASICs in the wider world of circuit-level and board design because they usually can't deliver the same speed and low-power requirements. But they've found a home in higher-end networking components because they can be re-programmed in the field to chase out bugs or introduce custom programming. Well, true FPGAs can be, anyway. There are fixed versions that can't be reprogrammed, but some consider these to be simple ASICs in disguise.

 

At the moment, it doesn't look like there will be a shortage of solutions in either ASIC- or FPGA-based PCIe cores. Firms like Altera are producing a variety of FPGA solutions for x1, x4 and x8 applications, while ASIC Architectures is producing multiple endpoint, root port, dual-mode and switch port cores. And then there are firms like PLDA, which utilize both semiconductors.

 

Speed and power consumption will likely remain central issues to more computer users for the time being, so demand will likely be steady for generic ASIC designs. But more specialized systems should also maintain a following, as long as designers can come up with compelling approaches to solve networking problems.



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